IT on a chip

16.01.2007

Markus Levy, an analyst who serves as president of The Multicore Association and the Embedded Microprocessor Benchmark Consortium, says the move to embed more hardware-assisted features will undoubtedly bring performance gains. But measuring any specific gain is a new challenge that industry groups are only beginning to address.

Increasing the clock speed of microprocessors has provided only minimal performance gains in the past few years as processor manufacturers have hit the wall in the trade-off between speed and the heat generated by the chips. Even the addition of multiple cores within processors running at lower clock speeds to reduce heat is expected to see diminishing returns as those chips move to eight or more cores, Levy explains.

In traditional architectures the use of additional cores will not necessarily help applications that require specific optimization, he says, adding to the need for hardware-enabled assists. "When you are trying to do a specific function like security acceleration, adding another processor core can be an expensive piece of hardware, compared to enabling that capability by using only 100,000 or so gates inside the existing chip," Levy says.

Determining the level of performance enhancement that is associated with those hardware-assisted hooks and accelerators is a task the technology is just beginning to tackle.

"We're going to have to have benchmarks that are specifically tailored toward the use of those features," Levy says. "It is also going to require that we think of performance in a different way. It is going to be pretty challenging to develop a benchmark suite that will work on everybody's platform as they become increasingly custom."