The new memory capability, called scalable buffer memory, can overcome traditional server memory limitations and pack additional memory capacity without adding new hardware. Sitting as an on-board component between the CPU and DDR3 memory, the technology manipulates communication channels to expand memory capacity and overcome limitations to the amount of memory that can fit in servers.

"As you look into the mission critical space, where higher capacities and bandwidths come into play, now you're implementing this solid component on board that's allowing you higher bandwidth and more capacities than what you would have had," said Rajesh Agny, marketing manager of the mission critical platform at Intel.

The new capabilities represent an implementation of future technologies that could be in multiple Itanium architectures going into the next decade, Tauzer said.

The Tukwila processor, announced in 2007, doubles the performance of Intel's current Itanium 9100 dual-core processors. The chip has about 2 billion transistors and includes 30MB of on-cache memory. Intel last year revealed the chip to run at 2GHz and said it would include dual-integrated memory controllers.

It also includes QuickPath Interconnect (QPI) technology, which integrates a memory controller and provides a faster pipe for the CPU to communicate with other system components.