Increasingly, solid-state vendors have recognized that the key to realizing improved performance is putting flash close to the CPU, and they are creating devices that use natively, without the inhibitors of outdated translation layers.

BACKGROUND:

However, some of these devices hamstring performance by placing the flash under the control of legacy storage implementations of SATA or SAS controllers that were initially designed for disks. These protocols and data handling mechanisms were never intended to operate with NAND flash and do not do any justice to NAND flash capabilities. It's like putting a performance automobile engine into the body of a 25-year-old clunker.

The same thing goes for RAID controllers. Initially designed to aggregate the performance of multiple disks and protect from individual disk failures, conventional RAID mechanisms work well for spinning media. However, these mechanisms do not work well for NAND flash, because they inject too much latency.

The best mechanism to place flash in a server is referred to as native PCIe access, where legacy storage technologies are put aside, and a new cut-through architecture provides the most direct, accessible, and lowest latency path between the NAND flash and the host memory.